Semiconductor devices such as microprocessors can be made up of millions of transistors, each interconnected by thin metallic lines branching over several levels and isolated electrically from each other by layers of dielectric materials. When a new semiconductor design is first produced in a semiconductor fabrication facility, it is typical to find that the design does not operate exactly as expected. It is then necessary for the engineers who designed the device to test their design and “rewire” it to achieve the desired functionality. Due to the complexity of building a semiconductor device in the semiconductor fabrication facility, it typically takes weeks or months to have the re-designed device produced. Further, the changes implemented frequently do not solve the problem or expose a yet further difficulty in the design. The process of testing, re-designing and re-fabrication can significantly lengthen the time to market new semiconductor devices.
Circuit editing—the process of modifying a circuit during its development without having to remanufacture the whole circuit—provides tremendous economic benefits by reducing both processing costs and development cycle times. In most cases, the feature to be modified is buried under other material, such as insulating layers, and, in the case of “flip chips,” semiconductor layers. Therefore it is typically necessary to mill down through these layers of materials to reach the metal feature of interest without damaging adjacent circuit features. This is known as deprocessing. Deprocessing is not limited to circuit editing applications. Deprocessing can be used in other applications where access to buried features located under other material is required. For example, FIB-based Failure Analysis (FA) might require deprocessing to allow access to hidden, lower metal layers for the purpose of fault isolation using passive voltage contrast, or to expose features for electrical probing.
Over the past decade, techniques have been developed to allow Focused Ion Beam (FIB) systems to reduce the time required for this procedure of perfecting a design. FIB systems produce a narrow, focused beam of charged particles (hereinafter referred to as ions) which is typically scanned across a specimen in a raster fashion, similar to a cathode ray tube. Commercial FIB systems typically use positively charged ions from liquid metal ion sources or plasma ion sources. Modern FIB systems can be used to form an image of a sample surface much like an electron microscope. The intensity at each point of the image is determined by the current of secondary electrons or other particles ejected by the ion beam at the corresponding point on the substrate. The ion beam can also be used to remove material from the sample surface or to deposit material (typically by using a gas that decomposes in the presence of the ion beam and deposits material onto the surface.). When used to remove material, the ions in the focused ion beam physically eject atoms or molecules from the surface by sputtering, that is, by a transfer of momentum from the incoming ions to the atoms at the surface.
FIB instruments can be used to mill away a target area of a semiconductor device to expose the layers buried within the device. The target area, typically comprising mixed layers of conductor and dielectric, can be milled by rastering a beam of ions across the area of interest. The beam is typically scanned across the area to be milled using digital electronics that step the beam from point to point. The distance between points is referred to as the pixel spacing. Pixel spacing is typically less than the beam spot size, that is, each subsequent beam position overlaps the previous position in an attempt to obtain a uniform cut and a smooth finish. This method is referred to as ‘Default Milling’. Milling methods have been well documented, for example, in U.S. Pat. No. 5,188,705 to Swanson, et. al. for “Method of Semiconductor Device Manufacture”.
During FIB processing for circuit editing or failure analysis (FA), it is common to have to deprocess a relatively large area of multiple layers, each layer having copper and dielectric materials embedded in the same layer. When these types of mixed layers are sputtered by a FIB, the difference in sputtering rate between copper and the dielectric material also tends to result in a non-uniform milling floor.
Chemistries have been developed that selectively attack certain materials, causing it to sputter more quickly in the presence of certain gases than with just the ion beam alone. This process is well-known within the art and is commonly referred to as Gas Assisted Etching (GAE). Because it speeds up the removal process, GAE can be used, for example, to mill relatively large areas of a surface layer or layers to expose underlying layers for observation and testing. However, one drawback with using GAE to mill relatively large areas of a surface layer comprising mixed materials is that the chemistries used to assist FIB milling typically enhance the removal of one material in the presence of other materials. One material is selectively etched at a higher rate than the other, exacerbating the problem of a non-uniform milling floor. For example, U.S. Pat. No. 7,883,630 relates to chemistries for copper removal but emphasizes the selective removal of copper relative to dielectrics, rather than the 1:1 removal rates that are ideal for planar deprocessing. Water can be used for planar deprocessing on semiconductor devices with Si3N4 etch stops, but it is not effective on modern devices with SiC capping layers.
Although several techniques to improve the uniformity of copper milling are known, none of these techniques adequately solve the problems of milling through mixed copper and dielectric layers. Hence, there is a need for an improved technique to allow more uniform milling through multiple layers of mixed copper and dielectric for planar deproces sing with a focused ion beam.